IJTEEE
International Journal of Technology Enhancements and Emerging Engineering Research (ISSN 2347-4289)
PREVIOUS PUBLICATIONS



IJTEEE >> Volume 2 - Issue 5, May 2014 Edition



International Journal of Technology Enhancements and Emerging Engineering Research  
International Journal of Technology Enhancements and Emerging Engineering Research

Website: http://www.ijteee.org

ISSN 2347-4289



Full Bridge Phase Shifted On-Chip Dc-Dc Converter For Point-Of-Load Voltage Regulation

[Full Text]

 

AUTHOR(S)

Jaya Kaviya.V, Manjula Devi .K, Dr. Marimuthu. C. N

 

KEYWORDS

Keywords: Hybrid voltage regulator, active filter, On-Chip voltage regulator, full bridge phase shifter, point –of –load voltage regulation.

 

ABSTRACT

ABSTRACT: DC-DC converter is important in portable electronic devices which are supplied with power from batteries primarily. Such electronic devices often contain several sub-circuits, in which switched DC to DC converters offer a multiple voltage levels from a partially lowered battery voltage thereby saving space instead of using multiple batteries. An active filter based on-chip DC-DC voltage converter provides distributed multiple local power supplies across an integrated circuit while maintaining high current efficiency within a small area. The area occupied by the circuit is small because no inductor or capacitor is required than other voltage regulators. The circuit is appropriate for noise sensitive portions of an integrated circuit. Digital current mode control in a full bridge phase shifted DC-DC converter is introduced. So that, the digital current controller performs gain adjustments scheme to achieve fast dynamic response and a current sampling scheme to avoid switching noise and spike in DC-DC converter. The MATLAB tool is used for the simulation of the voltage regulators

 

REFERENCES

[1] Selcuk Kose,Sally Pinzon,Bruce McDermott, and Eby Friedman.G,(2013), ”Active filter based hybrid on-chip DC-DC converter for point-of-load voltage regulation”.

[2] Al-Shyoukh. A, Lee. H, and Perez. R, (2007),“A transient-enhanced low quiescent current low-dropout regulator with buffer impedance attenuation,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1732–1742 .

[3] Besten.G. W. D and Nauta. B, (1998),“Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC’s in 3.3 V CMOS technology,” IEEE J. Solid-State Circuits, vol. 33, no. 7, pp. 956–962.

[4] Guo. J and Leung. K. N, (2010), “A 6-μW chip-area-efficient output capacitorless LDO in 90-nm CMOS technology,” IEEE J. Solid-StateCircuits, vol. 45, no. 9, pp. 1896–1905.

[5] Hazucha. P, Karnik. T, Bloechel. B. A, Parsons. C, Finan. D, and Borkar. S, (2005), “Area-efficient linear regulator with ultrafast load regulation,” IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 933–940.

[6] Ingino. J. M and Kaenel. V. R. V, (2001), “A 4-GHz clock system for a high performance system-on-a-chip design,” IEEE J. Solid-State Circuits, vol. 36, no. 11, pp. 1693–1698.

[7] Jakushokas. R, Popovich. M, Mezhiba. A. V, Kose. S, and Friedman. E. G, (2011), Power Distribution Networks with On-Chip Decoupling Capacitors, 2nd ed. New York: Springer-Verlag.s

[8] Kim. J, Lee. W, Shim. Y,Shim. J, Kim. K, Pak. J. S, and Kim.J, (2010), “Chip package hierarchical power distribution network modeling and analysis based on a segmentation method,” IEEE Trans. Adv. Packag., vol. 33, no. 3, pp. 647–659.

[9] Kose. S and Friedman. E. G, (2010), “On-chip point-of-load voltage regulator for distributed power supplies,” in Proc. ACM Great Lakes Symp. VLSI, pp. 377–380.

[10] Kose. S and Friedman. E. G, (2011), “Distributed power network co-design with on-chip power supplies and decoupling capacitors,” in Proc. Workshop Syst. Level Interconn. Predict., San Diego, CA, pp. 1–5.

[11] Kose. S, Tam.S, Pinzon.S, Mcdermott. B, and Friedman. E. G, (2012), “An area efficient on-chip hybrid voltage regulator,” in Proc. IEEE Int. Symp. Quality Electron. Design, pp. 2718–2721.

[12] Kursun. V, Narendra. S .G, De.V.K, and Friedman. E. G, (2003), “Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor,” IEEE Trans. Very Large Scale Intesgr. (VLSI) Syst., vol.11, no. 3, pp. 514–522.

[13] Le. H. P, Seeman. M, Sanders. S. R, Sathe. S, Naffziger. S, and Alon. E, (2010), “A 32 nm fully integrated reconfigurable switched-capacitor DC-DC converter delivering 0.55 W/mm2 at 81% efficiency,” in Proc. IEEE Int. Solid-State Circuits Conf.,pp. 210–211.

[14] Man. T. Y, Mok. P. K.T, and Chan. M, (2007), “A high slew-rate push-pull output amplifier for low-quiescent current low-dropout regulators with transient-response improvement,” IEEE Trans. Circuits Syst. II, Exp.Briefs, vol. 54, no. 9, pp. 755–759.

[15] Or. P. Y and Leung. K. N, (2010), “An output-capacitorless low-dropout regulator with direct voltage-spike detection,” IEEE J. Solid-State Circuits, vol. 45, no. 2, pp. 458–466.

[16] P. R. Sallen and E. L. Key, “A practical method for designing RC active filter,” IRE Trans. Circuit Theory, vol. 2, pp. 74–85, Mar. 1955.

[17] Rincon-Mora. G. A and Allen. P. E, (1998), “Optimized frequency-shaping circuit topologies for LDOs,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 6, pp. 703–708.

[18] Zeng. Z, Ye. X, Feng.Z, and Li. P, (2010), “Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation,” in Proc. IEEE/ACM Design Autom. Conf., Anaheim, CA, pp. 831– 836.

[19] Zhou. Q, Shi. J, Liu. B, and Cai. Y, (2011),“Floorplanning considering IR drop in multiple supply voltages island designs,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 19, no. 4, pp. 638–646.

[20] Swartz.C.R (2012),”High performance ZVS buck regulator removes Barriers to increased power throughput in wide input range point-of-load applications”, vicor corporation.