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International Journal of Technology Enhancements and Emerging Engineering Research (ISSN 2347-4289)
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IJTEEE >> Volume 3 - Issue 4, April 2015 Edition



International Journal of Technology Enhancements and Emerging Engineering Research  
International Journal of Technology Enhancements and Emerging Engineering Research

Website: http://www.ijteee.org

ISSN 2347-4289



Enhancement Of H-Bridge Multilevel Inverter Designed With The Avoidance Of Capacitor Voltage Balancing Problem Using Fpga

[Full Text]

 

AUTHOR(S)

G. S. Arunkumar, Kiruthiga. S, N. Sanjeev

 

KEYWORDS

Keywords: Field Programmable Gate, Array(FPGA),Direct Current(DC),Very High Speed Description Language(VHDL).

 

ABSTRACT

ABSTRACT: A single phase multilevel inverter for dcto ac conversion is developed with minimum number of power electronic devices and isolated DC sources with implementation using FPGA. The total harmonics of the output waveform is reduced by increasing the switching modes with reduced devices. The H-Bridge multilevel inverter has two inverters connected in cascade. The proposed inverter can output more numbers of voltage levels in the same number of switching devices by using this conversion. The number of gate driving circuits is reduced, which leads to the reduction of the size and power consumption in the driving circuits. The total harmonic of the output waveform is also reduced. The proposed inverter is driven by the hybrid modulation method.The hybrid modulation algorithm is simulated using MATLAB/Simulink. The VHDL code for each of this topology was written and synthesized using Xilinx ISE software. Behavioral Simulation was performed on the architecture and after verifying the results this VHDL code was downloaded to SPARTAN 3A DSP board.

 

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