A Review On Design And Analysis Of D Flip Flop With Different Technologies

Abstract: The Field of Digital Electronics have been directly towards to the low power of digital system. Recently the requirement of Probability and the improvement in battery performance indicate power dissipation is one of the most critical design parameter. wide utilization of memory storage systems and sequential logic in modern electronics triggers a demand for high performance and low area implementations of basic memory component one of the most state holding element is D flip flop. Here the proposed work is to design and analyze the D flip flop using CMOS, GDI technique, DETFF and CNTFET techniques and then compared with each other for power dissipation. The whole process of design and analysis of D flip flop and simulation will be done by using Tanner EDA.

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